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Comment:uexec.c: Fix brain-typos.
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SHA3-256: 27abad61362d6911944f010a28cb862f8543fc44204cd1cf20796abc5ad09289
User & Date: ams 2024-06-26 15:51:58
Context
2024-06-26
16:23
uexec.c (mfread): Manage register 016. check-in: c10b5ec3c4 user: ams tags: trunk
15:51
uexec.c: Fix brain-typos. check-in: 27abad6136 user: ams tags: trunk
15:42
Makefile (CFLAGS): Add -I/opt/local/include for OS X users. check-in: 3c3c94e444 user: ams tags: trunk
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Changes to uexec.c.

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		mfmem[014] = (mfmem[014] - 1) & 01777;
		return res;
	case 025:
		DEBUG(TRACE_MICROCODE, "reading pdl[%o] -> %o\n", mfmem[014], pdl[mfmem[014]]);
		res = pdl[mfmem[014]];
		trace_pdlptr_read(mdata);
		return res;




	}
	err(1, "unknown MF register (%o) read\n", addr);
}

void
mfwrite(int dest, uint64_t data)
{
	switch (dest >> 5) {

	case 1:		/* LOCATION-COUNTER LC (location counter) 26 bits. */
		DEBUG(TRACE_UCODE, "writing LC <- %o\n", data);
		mfmem[1] = (mfmem[1] & ~0377777777) | (data & 0377777777);
		if (interrupt_control & (1 << 29)) {
			/*
			 * ---!!! Not sure about byte mode...
			 */
		} else {
			/*
			 * In half word mode, low order bit is
			 * ignored.
			 */
			mfmem[1] &= ~1;
		}
		/*
		 * Set NEED-FETCH.
		 */
		mfmem[1] |= (1UL << 31UL);
		break;
	case 2:		/* INTERRUPT-CONTROL Interrupt Control <29-26>. */
		DEBUG(TRACE_UCODE, "writing IC <- %o\n", data);
		interrupt_control = data;
		if (interrupt_control & (1 << 26)) {
			DEBUG(TRACE_UCODE, "ic: sequence break request\n");
		}
		if (interrupt_control & (1 << 27)) {
			DEBUG(TRACE_UCODE, "ic: interrupt enable\n");
		}
		if (interrupt_control & (1 << 28)) {
			DEBUG(TRACE_UCODE, "ic: bus reset\n");
		}
		if (interrupt_control & (1 << 29)) {
			DEBUG(TRACE_UCODE, "ic: lc byte mode\n");
		}
		mfmem[1] = (mfmem[1] & ~(017 << 26)) |	/* Preserve flags. */
			(interrupt_control & (017 << 26));
		break;
	case 010:		/* C-PDL-BUFFER-POINTER PDL (addressed by pointer) */
		DEBUG(TRACE_UCODE, "writing pdl[%o] <- %o\n", mfmem[014], data);
		trace_pdlptr_write(data);
		pdl[mfmem[014]] = data;
		break;
	case 011:		/* C-PDL-BUFFER-POINTER-PUSH PDL (addressed by pointer, push) */
		mfmem[014] = (mfmem[014] + 1) & 01777;
		DEBUG(TRACE_UCODE, "writing pdl[%o] <- %o, push\n", mfmem[014], data);
		trace_pdlptr_push(data);
		pdl[mfmem[014]] = data;
		break;
	case 012:		/* C-PDL-BUFFER-INDEX PDL (address by index). */
		DEBUG(TRACE_UCODE, "writing pdl[%o] <- %o\n", mfmem[013], data);
		pdl[mfmem[013]] = data;
		trace_pdlidx_write(data);
		break;
	case 013:		/* PDL-BUFFER-INDEX PDL index. */
		DEBUG(TRACE_UCODE, "pdl-index <- %o\n", data);
		mfmem[013] = data & 01777;
		break;
	case 014:		/* PDL-BUFFER-POINTER PDL pointer. */
		DEBUG(TRACE_UCODE, "pdl-ptr <- %o\n", data);
		mfmem[014] = data & 01777;
		break;
	case 015:		/* MICRO-STACK-DATA-PUSH SPC data, push. */
		pushSPC(data);
		break;
	case 016:		/* OA-REG-LO Next instruction modifier (lo). */
		mfmem[016] = data & 0377777777;
		oal = true;
		DEBUG(TRACE_UCODE, "setting oa_reg lo %o\n", mfmem[016]);
		break;
	case 017:		/* OA-REG-HI Next instruction modifier (hi). */
		mfmem[017] = data;
		oah = true;
		DEBUG(TRACE_UCODE, "setting oa_reg hi %o\n", mfmem[017]);
		break;
	case 020:		/* VMA VMA register (memory address). */
		mfmem[020] = data;
		break;
	case 021:		/* VMA-START-READ VMA register, start main memory read. */
		mfmem[020] = data;
		vmRead(mfmem[020], &new_md);
		new_md_delay = 2;
		break;
	case 022:		/* VMA-START-WRITE VMA register, start main memory write. */
		mfmem[020] = data;
		vmWrite(mfmem[020], mfmem[030]);
		break;
	case 023:		/* VMA-WRITE-MAP VMA register, write map. */
		mfmem[020] = data;
		DEBUG(TRACE_VM, "vma-write-map md=%o, vma=%o (addr %o)\n", mfmem[030], mfmem[020], mfmem[030] >> 13);
		mapWrite();
		break;
	case 030:		/* MEMORY-DATA MD register (memory data). */
		mfmem[030] = data;
		DEBUG(TRACE_UCODE, "md<-%o\n", mfmem[030]);
		break;
	case 031:		/* MEMORY-DATA-START-READ */
		mfmem[030] = data;
		vmRead(mfmem[020], &new_md);
		new_md_delay = 2;
		break;
	case 032:		/* MEMORY-DATA-START-WRITE */
		mfmem[030] = data;
		vmWrite(mfmem[020], mfmem[030]);
		break;
	case 033:		/* MEMORY-DATA-WRITE-MAP MD register, write map (like 23). */
		mfmem[030] = data;
		DEBUG(TRACE_UCODE, "memory-data-write-map md=%o, vma=%o (addr %o)\n", mfmem[030], mfmem[020], mfmem[030] >> 13);
		mapWrite();
		break;
	}
	err(1, "unknown MF register (%o) write (%lo)\n", dest, data);
}

/*
 * Write value to decoded destination.
 */







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		mfmem[014] = (mfmem[014] - 1) & 01777;
		return res;
	case 025:
		DEBUG(TRACE_MICROCODE, "reading pdl[%o] -> %o\n", mfmem[014], pdl[mfmem[014]]);
		res = pdl[mfmem[014]];
		trace_pdlptr_read(mdata);
		return res;
	case 026:
		res = 0; 	/* ??? */
		return res;
		
	}
	err(1, "unknown MF register (%o) read\n", addr);
}

void
mfwrite(int dest, uint64_t data)
{
	switch (dest >> 5) {
	case 0: return;
	case 1:		/* LOCATION-COUNTER LC (location counter) 26 bits. */
		DEBUG(TRACE_UCODE, "writing LC <- %o\n", data);
		mfmem[1] = (mfmem[1] & ~0377777777) | (data & 0377777777);
		if (interrupt_control & (1 << 29)) {
			/*
			 * ---!!! Not sure about byte mode...
			 */
		} else {
			/*
			 * In half word mode, low order bit is
			 * ignored.
			 */
			mfmem[1] &= ~1;
		}
		/*
		 * Set NEED-FETCH.
		 */
		mfmem[1] |= (1UL << 31UL);
		return;
	case 2:		/* INTERRUPT-CONTROL Interrupt Control <29-26>. */
		DEBUG(TRACE_UCODE, "writing IC <- %o\n", data);
		interrupt_control = data;
		if (interrupt_control & (1 << 26)) {
			DEBUG(TRACE_UCODE, "ic: sequence break request\n");
		}
		if (interrupt_control & (1 << 27)) {
			DEBUG(TRACE_UCODE, "ic: interrupt enable\n");
		}
		if (interrupt_control & (1 << 28)) {
			DEBUG(TRACE_UCODE, "ic: bus reset\n");
		}
		if (interrupt_control & (1 << 29)) {
			DEBUG(TRACE_UCODE, "ic: lc byte mode\n");
		}
		mfmem[1] = (mfmem[1] & ~(017 << 26)) |	/* Preserve flags. */
			(interrupt_control & (017 << 26));
		return;
	case 010:		/* C-PDL-BUFFER-POINTER PDL (addressed by pointer) */
		DEBUG(TRACE_UCODE, "writing pdl[%o] <- %o\n", mfmem[014], data);
		trace_pdlptr_write(data);
		pdl[mfmem[014]] = data;
		return;
	case 011:		/* C-PDL-BUFFER-POINTER-PUSH PDL (addressed by pointer, push) */
		mfmem[014] = (mfmem[014] + 1) & 01777;
		DEBUG(TRACE_UCODE, "writing pdl[%o] <- %o, push\n", mfmem[014], data);
		trace_pdlptr_push(data);
		pdl[mfmem[014]] = data;
		return;
	case 012:		/* C-PDL-BUFFER-INDEX PDL (address by index). */
		DEBUG(TRACE_UCODE, "writing pdl[%o] <- %o\n", mfmem[013], data);
		pdl[mfmem[013]] = data;
		trace_pdlidx_write(data);
		return;
	case 013:		/* PDL-BUFFER-INDEX PDL index. */
		DEBUG(TRACE_UCODE, "pdl-index <- %o\n", data);
		mfmem[013] = data & 01777;
		return;
	case 014:		/* PDL-BUFFER-POINTER PDL pointer. */
		DEBUG(TRACE_UCODE, "pdl-ptr <- %o\n", data);
		mfmem[014] = data & 01777;
		return;
	case 015:		/* MICRO-STACK-DATA-PUSH SPC data, push. */
		pushSPC(data);
		return;
	case 016:		/* OA-REG-LO Next instruction modifier (lo). */
		mfmem[016] = data & 0377777777;
		oal = true;
		DEBUG(TRACE_UCODE, "setting oa_reg lo %o\n", mfmem[016]);
		return;
	case 017:		/* OA-REG-HI Next instruction modifier (hi). */
		mfmem[017] = data;
		oah = true;
		DEBUG(TRACE_UCODE, "setting oa_reg hi %o\n", mfmem[017]);
		return;
	case 020:		/* VMA VMA register (memory address). */
		mfmem[020] = data;
		return;
	case 021:		/* VMA-START-READ VMA register, start main memory read. */
		mfmem[020] = data;
		vmRead(mfmem[020], &new_md);
		new_md_delay = 2;
		return;
	case 022:		/* VMA-START-WRITE VMA register, start main memory write. */
		mfmem[020] = data;
		vmWrite(mfmem[020], mfmem[030]);
		return;
	case 023:		/* VMA-WRITE-MAP VMA register, write map. */
		mfmem[020] = data;
		DEBUG(TRACE_VM, "vma-write-map md=%o, vma=%o (addr %o)\n", mfmem[030], mfmem[020], mfmem[030] >> 13);
		mapWrite();
		return;
	case 030:		/* MEMORY-DATA MD register (memory data). */
		mfmem[030] = data;
		DEBUG(TRACE_UCODE, "md<-%o\n", mfmem[030]);
		return;
	case 031:		/* MEMORY-DATA-START-READ */
		mfmem[030] = data;
		vmRead(mfmem[020], &new_md);
		new_md_delay = 2;
		return;
	case 032:		/* MEMORY-DATA-START-WRITE */
		mfmem[030] = data;
		vmWrite(mfmem[020], mfmem[030]);
		return;
	case 033:		/* MEMORY-DATA-WRITE-MAP MD register, write map (like 23). */
		mfmem[030] = data;
		DEBUG(TRACE_UCODE, "memory-data-write-map md=%o, vma=%o (addr %o)\n", mfmem[030], mfmem[020], mfmem[030] >> 13);
		mapWrite();
		return;
	}
	err(1, "unknown MF register (%o) write (%lo)\n", dest, data);
}

/*
 * Write value to decoded destination.
 */