| Ticket Hash: | a826011f2db228a34abc50f60a8a9f233f03544e | |||
| Title: | Arty A7 port | |||
| Status: | Open | Type: | Feature_Request | |
| Severity: | Minor | Priority: | Immediate | |
| Subsystem: | Resolution: | Open | ||
| Last Modified: | 2020-11-02 06:33:26 | |||
| Version Found In: | ||||
| User Comments: | ||||
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anonymous added on 2020-05-15 22:55:06:
So, it has been quite some time, but I'm still working on the Arty A7 port at https://github.com/nusgart/uhdl. It took me some time to find this repository. I'm much further along than I was before, and have gotten the arty to loading microcode 841 and part of system 78.48, but unless it's supposed to take more than 16 hours to boot, it seems to be stuck in `findcore3`. I've attempted using the CC program that used to come with usim to debug it, but I haven't been able to get CC to work. Have you been able to get CC to work and if so how? ams added on 2020-11-02 06:33:26: I missed this ticket (been busy on the usim front). Sorry that it took sometime to find this repo, etc. It should not take 14 hours to boot up, it takes maybe 10 minutes or so on my Spartan 6. CC should work just fine to debug the board, assuming that the serial line et al are working. If you are in FINDCORE3 that should mean that you are executing Lisp (via %FINDCORE), and possibly trying to access a wired page (see IO; DISK LISP, WIRE-PAGE)? Somewhat hard to say more. | ||||